In modern wireless communication systems such as Wideband Code Division Multiple Access (WCDMA) and Orthogonal Frequency Division Multiplex (OFDM) systems, there is a need for high-efficiency power amplifiers to accommodate the 3rd generation (3G) and the 4th generation (4G) of communication standards. These new standards provide more and advanced data services within a restricted frequency band and make use of signals with high Peak-to-Average Power Ratio (PAPR). As a result, base station amplifiers for these signals will operate, in most of time, at much lower power levels than the peak powers they are designed for. Consequently, traditional class-AB amplifiers are less attractive candidates for these signals since their efficiencies are seriously degraded when operating below their peak powers. To avoid this efficiency degradation, various amplifier structures with improved efficiency have been proposed.
The Doherty Power Amplifier (DPA) structure proposed by W. H. Doherty [1] in 1936 is a well-known technique providing potential for improved transmitter efficiency, especially for signal protocols with high PAPR (typically from 6 to 12 dB). Although the DPA has significant efficiency advantages, in general, it needs to be augmented with some form of correction or linearity enhancement (such as Digital Pre-Distortion) in a full transmitter design.
The attractiveness of the DPA configuration consists in that it involves familiar amplifier designs with a simple structure that maintains considerably high efficiency over an extended input signal range. The DPA structure has been energized by the latest transistor techniques and is well described in literatures. The DPA can be configured with 2-way, 3-way or multi-way combinations for high PAPR signals.
As shown in FIG. 1, the original DPA structure includes two amplifiers. In general, a DPA has a structure in which a carrier (main) amplifier (M) and a peak amplifier (P) have their outputs connected in parallel by using a quarter-wave impedance transformer (λ/4 transmission line). Further, the DPA is driven by a method as follows. The peak amplifier modulates a load impedance of the main amplifier by increasing the amount of current supplied to the load from the peak amplifier as the power level increases, thereby improving the efficiency of the DPA. The DPA structure shown in FIG. 1 further includes an input power splitter for distributing the input power to the main amplifier and the peak amplifier in a fixed ratio. As the input power splitter, for example, a passive branch-line hybrid, a ring hybrid, a Wilkinson power splitter or the like can be used. The input power splitter can be either a quadrature splitter or an in-phase splitter.
FIG. 2 shows a compact “series-type” DPA developed for mobile handset devices [2], [3], in which the bulky and lossy input power splitter/coupler is eliminated. Unlike the classical “parallel” connected DPA, in the DPA structure shown in FIG. 2, the main and peak amplifiers (M and P) are arranged in series, with the impedance inverting network (λ/4 transmission line) connecting the outputs of the main and peak amplifiers. The input power splitter is replaced with a simple phase delay and an input impedance matching circuit between the peak and main amplifiers. In this way, the need for an input power coupler is also eliminated, which facilitates integration (such as Monolithic Microwave Integrated Circuit (MMIC)) [4] and miniaturization.
Moreover, the series-type DPA enables a direct input power dividing technique [5]-[7] for enhanced efficiency and linearity. In practice, in the classical DPA, the low gain of the peak amplifier prevents the implementation of a proper load modulation. Therefore, neither of the main and peak amplifiers can generate its respective output power, leading to performance degradation. In order to overcome this problem, Kim et al. [8] used an uneven power divider at the input to the DPA to enhance the output power of the peak amplifier for a better load modulation, at the cost of lower gain and efficiency at back-off power levels. Another commonly used approach involves adaptive bias control [9], which, however, requires extra complicated circuits and thus increases sizes and costs.
The aforementioned problems can be alleviated through a power-dependent input power distribution to efficiently drive the main and peak amplifiers. This approach relies on the nonlinear behavior of the input impedance of the peak amplifier [6]. In essence, similar to output current of a transistor, the input capacitance of the peak amplifier is also a function of the input driving level (bias points). Consequently, the peak amplifier's input nonlinearities from the pinch-off region to the saturation region can be utilized for the so-called “source modulation”, which in turn improves the load modulation of the main and peak amplifiers at their outputs.
In the DPA, the main amplifier is biased in Class B or AB, and the peak amplifier is biased in Class C. Accordingly, only the main amplifier is operating at a low power level. As the power level increases, the efficiency of the main amplifier increases and reaches the first maximum efficiency point. At this power level, the peak amplifier is turned on. The second maximum efficiency point is reached when the peak amplifier provides a high efficiency. Therefore, the DPA has two maximum efficiency points, which improves the efficiency at the back-off output power level.
In the classical symmetrical DPA configuration, the saturation power of the main amplifier is ¼ of the maximum system output power. This results in an efficiency peak at 6-dB output power back-off from the normal peak efficiency power level. Therefore, compared to the main power amplifier, the size (asymmetrical devices) and numbers (multiple peak amplifiers, see FIGS. 3 and 4) of the peak power amplifier(s) determine the DPA's back-off output power level at the first maximum efficiency point. Accordingly, an improved average efficiency can be expected for amplification of modulated signals with high PAPR (>6 dB).
FIG. 3 shows an existing 3-way DPA structure (Type I) [12], in which two peak amplifiers operate in the same state. In the 3-way DPA shown in FIG. 3, an input power splitter is used at the DPA input. The output of the main amplifier (M) is connected to the DPA output via a λ/4 transmission line. The outputs of the peak amplifier 1 (P1) and the peak amplifier 2 (P2) are connected to the DPA output. FIG. 4 shows an arrangement in which the DPA structure of FIG. 3 is extended to N-way (with N−1 peak amplifiers operating in the same state).
FIGS. 5 and 7 show other two types of 3-way DPA structures [10]. These two types of 3-way DPAs have three maximum efficiency points in the back-off region and have two peak amplifiers operating at different states to improve the DPA efficiency. FIG. 6 shows an arrangement in which the DPA structure of FIG. 5 is extended to N-way. The DPA structure in FIG. 5 [13] (Type II) can be considered as a parallel combination of one DPA (composed of the main amplifier (M) and the peak amplifier 1 (P1) as shown in FIG. 5) used as a main amplifier and another peak amplifier (the peak amplifier 2 (P2) as shown in FIG. 5). The peak amplifier 1 (P1) modulates the load of the main amplifier (M) initially and the peak amplifier 2 (P2) modulates the load of the previous Doherty stage at a higher power. The DPA structure in FIG. 7 [11] (Type III) can be considered as a parallel combination of one DPA (composed of the peak amplifier 1 (P1) and the peak amplifier 2 (P2) as shown in FIG. 7) used as a peak amplifier and a main amplifier (the main amplifier (M) as shown in FIG. 7). Both structures use three power amplifier units, but the two peak amplifiers, P1 and P2, are turned on sequentially instead of simultaneously as in Type I DPA (FIG. 3). Thus, three peak efficiency points are formed, i.e., two turn-on points and a peak power point.
However, the Type II 3-way DPA cannot provide sufficient load modulation for the main amplifier. Accordingly, the gain at the low output power region where only the main amplifier is operating is lower than that of the DPA at the peak output power. Such gain fluctuation, which indicates a nonlinear AM-AM characteristic, is a serious problem of the Type II DPA. However, the Type III DPA can be designed using identical power amplifiers having the same peak envelope power. The load impedance of the main amplifier can be modulated over the full dynamic range. Thus, the Type III DPA theoretically provides a uniform gain across all input power levels. Besides, for the Type II 3-way DPA, a saturated operation of the main amplifier with constant current is required for proper output power combining. This highly saturated condition may destroy the device operation. This is another problem of the Type II DPA. In contrast, the Type III DPA does not have these problems and is thus preferred.
The series-type DPA can be extended to 3-way and N-way as well [3], as shown in FIGS. 8 and 9, respectively. The DPA circuits shown in FIGS. 8 and 9 can be considered as the electrical equivalents, in series-type arrangement, to the 3-way (FIG. 5) and N-way (FIG. 6) Type II DPAs.
In a case where PAPR>6 dB, the 3-way or N-way DPA configuration is preferred for a higher average efficiency. The disadvantages of the existing solutions for the parallel-connected 3-way DPAs are as follows:
Type I DPA:
                Only two peak efficiency points (similar to the 2-way asymmetrical DPA, i.e., the main amplifier and the peak amplifier having different sizes);        Incapable of maintaining high efficiency in the intermediate output power level;        Need for an input power splitter.Type II DPA:        Non-uniform power gain;        Insufficient load modulation for the main amplifier;        Highly saturated operation of the main amplifier with constant current;        Need for input power splitter.Type III DPA:        Need for input power splitter.        
It can be seen from above that the existing solutions for the parallel-type DPA need a power splitter/divider in the input circuit, which increases the circuit size and loss. Taking a 3-way DPA as an example, FIG. 10 shows several circuit design examples in which an input power coupler distributes an input signal to a main amplifier and two peak amplifiers based on a power distribution ratio of 1:1:1. For an N-way DPA, more complicated power coupler circuits are required.
On the contrary, the existing solutions for the 3-way and N-way (as shown in FIGS. 8 and 9) series-type DPA do not need the bulky input power splitter, resulting in an enhanced linearity and a higher integration. However, while the highly saturated operation of the main amplifier can be avoided in the 3-way series-type DPA, it still has similar problems as in the parallel-connected Type II DPA, such as non-uniform power gain, insufficient load modulation for the main amplifier, etc.